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Jun 27 2011 | 5:05pm ETOriginal publication date: Mar 01, 2011
This paper presents a Hardware Accelerated FIX Order Cancel System. The open source FIX Engine, QuickFIX is accelerated using Field Programmable Gate Array (FPGA) technology. The acceleration is performed by an FPGA based network card which is optimized for QuickFIX. FIX 4.2 Order Cancel messages are generated entirely inside the FPGA. The latency from the Order Cancel trigger to when the first byte is on the wire is 314 nanoseconds. The latency from the Order Cancel trigger to when the first FIX Order Cancel message is entirely on the wire is 1,874 nanoseconds.